[Xen-devel] RE: One potential issue of shadow fault emulation

["Jiang, Yunhong" <yunhong.jiang@xxxxxxxxx>]

Tim Deegan <mailto:Tim.Deegan@xxxxxxxxxx> wrote:
> Hi,
> 
> At 22:58 +0800 on 21 Dec (1198277929), Jiang, Yunhong wrote:
>> Currently shadow fault handler try to emulate up to four extra
>> instruction for PAE guest, to reduce vmexit times.
>> 
>> But there is a potential issue here: Consider the second instruction
is
>> a change to virtual TPR register. In physical environment, if the TPR
>> acceleration is enabled, the cpu will try to access the
>> VIRTUAL_APIC_PAGE_ADDR set in the VMCS. However, when we do
emulation,
>> we didn't cope with this situation, and will access the
APIC_ACCESS_ADDR
>> page pointed by the shadow. This is sure cause problem to guest,
usually
>> blue screen, and this issue will happen randomly depends on the
content in
>> the  apic access page. 
>> 
>> So how should we cope with such situation? Stop emulation or,
continue
>> emulate , but access the virtual APIC page? Or any better idea?
> 
> We should stop emulation.  Probably nobody writes the TPR between the
two
> halves of a PTE write. :) 

This did happen :)

> 
> Cheers,
> 
> Tim.
> 
> --
> Tim Deegan <Tim.Deegan@xxxxxxxxxx>
> Principal Software Engineer, Citrix Systems.
> [Company #5334508: XenSource UK Ltd, reg'd c/o EC2Y 5EB, UK.]

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