Re: [Xen-devel]Question about qemu interrupt deliver.

To:	"Xu, Anthony" <anthony.xu@xxxxxxxxx>, Keir Fraser <keir@xxxxxxxxxxxxx>
Subject:	Re: [Xen-devel]Question about qemu interrupt deliver.
From:	Keir Fraser <Keir.Fraser@xxxxxxxxxxxx>
Date:	Wed, 29 Nov 2006 08:10:51 +0000
Cc:	xen-devel@xxxxxxxxxxxxxxxxxxx, xen-ia64-devel <xen-ia64-devel@xxxxxxxxxxxxxxxxxxx>
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On 29/11/06 7:57 am, "Xu, Anthony" <anthony.xu@xxxxxxxxx> wrote:

> 1. Why is the interrupt router table put inside hypervisor other than
> Qemu?
> 
> 2. Why is the relationship of PCI device interrupt pin to IOAPIC input
> pin put 
>    inside hypervisor other than Qemu?

Since the PICs live in Xen it seems cleaner to move interrupt steering there
too and have a clean device-level interface to device models. It also means
that this core piece of chipset infrastructure is available for use by PCI
devices that we may implement in Xen or anywhere else outside the qemu-dm
process in future, so in this respect it is more flexible rather than less.

 -- Keir

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